外文翻译---语言概观

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1、附录4英文资料及译文1英文资料(FromDIGITALDESIGNprinciples&practices,JohnF.Wakerly)LanguageOverviewWhatisVHDL?VHDLisaprogramminglanguagethathasbeendesignedandoptimizedfordescribingthebehaviorofdigitalsystems.VHDLhasmanyfeaturesappropriatefordescribingthebehaviorofelectroniccom

2、ponentsrangingfromsimplelogicgatestocompletemicroprocessorsandcustomchips.FeaturesofVHDLallowelectricalaspectsofcircuitbehavior(suchasriseandfalltimesofsignals,delaysthroughgates,andfunctionaloperation)tobepreciselydescribed.TheresultingVHDLsimulationmodelscanth

3、enbeusedasbuildingblocksinlargercircuits(usingschematics,blockdiagramsorsystem-levelVHDLdescriptions)forthepurposeofsimulation. VHDLisalsoageneral-purposeprogramminglanguage:justashigh-levelprogramminglanguagesallowcomplexdesignconceptstobeexpressedascomputerpro

4、grams,VHDLallowsthebehaviorofcomplexelectroniccircuitstobecapturedintoadesignsystemforautomaticcircuitsynthesisorforsystemsimulation.LikePascal,CandC++,VHDLincludesfeaturesusefulforstructureddesigntechniques,andoffersarichsetofcontrolanddatarepresentationfeature

5、s.Unliketheseotherprogramminglanguages,VHDLprovidesfeaturesallowingconcurrenteventstobedescribed.ThisisimportantbecausethehardwaredescribedusingVHDLisinherentlyconcurrentinitsoperation.OneofthemostimportantapplicationsofVHDListocapturetheperformancespecification

6、foracircuit,intheformofwhatiscommonlyreferredtoasatestbench.TestbenchesareVHDLdescriptionsofcircuitstimuliandcorrespondingexpectedoutputsthatverifythebehaviorofacircuitovertime.TestbenchesshouldbeanintegralpartofanyVHDLprojectandshouldbecreatedintandemwithotherd

7、escriptionsofthecircuit. AstandardlanguageOneofthemostcompellingreasonsforyoutobecomeexperiencedwithandknowledgeableinVHDLisitsadoptionasastandardintheelectronicdesigncommunity.UsingastandardlanguagesuchasVHDLvirtuallyguaranteesthatyouwillnothavetothrowawayandre

8、capturedesignconceptssimplybecausethedesignentrymethodyouhavechosenisnotsupportedinanewergenerationofdesigntools.Usingastandardlanguagealsomeansthatyouaremorelikelyto