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时间:2019-08-12
《Transimpedance Amplifier Design》由会员上传分享,免费在线阅读,更多相关内容在学术论文-天天文库。
1、CHAPTER6TransimpedanceAmplifierDesignThephotocurrentgeneratedbythephotodetectorthroughoptoelectronicconversionoftheincom-inglightmustbeconditionedtocomplywiththerequirementsoftheclockanddatarecoveryblock.TheCDRperformsretimingandsynchronizationofthereceiveddatastream,butreq
2、uirestheinputsig-nalamplitudetobeconstantandlargerthanitsinputsensitivity.Forthispurpose,thephotocurrentisconvertedtothevoltagedomaininthetransimpedanceamplifier(TIA).Thiscurrent-voltage(I-V)con-versionintrinsicallyprovidessignalamplificationbythegainZTIA,commonlycalledtran
3、simpedancegain.Additionalgainisthenimplementedinthelimitingamplifier(LA)inthenextstepofthecondi-tioningprocess.6.1PrinciplesofI-VConversionFIGURE6.1.BasicI-VconverterwithvoltagefollowerThemostbasiccurrent-to-voltageconvertersendsthephotocurrentthroughaseriesresistorRTIAandu
4、sesanamplifierwithvoltagegainAvTIAinunity-gainconfigurationtobufferthesignal(Figure6.1).TheI-VgainisgivenbytheresistorvalueRTIA,whilethebandwidth,determinedbythepassivefront-end,isgiveninEquation6.1.Inthisexpression,thephotodetectorcapacitanceCPDis73CMOSMultichannelSingle-C
5、hipReceiversforMulti-GigabitOpticalDataCommunicationssupposedtobethedominanttermofthetotalinputcapacitance,comparedtotheamplifierinputcapac-itanceandotherstraycapacitancesconnectedtothisnode.1BW=------------------------------(EQ6.1)2πRCTIAPDThetrade-offbetweentheI-Vgaincont
6、ributedbytheresistorandthebandwidthrepresentsthemajorlimitationofthisstructure.Designforhighgaininthepassivestageleadstoalargevoltagesignalattheamplifierinput,minimizingtheinfluenceoftheamplifiernoise,butreducingthesignalband-width.Lowgainontheotherhandreducesthesignal-to-n
7、oiseratio(SNR)attheamplifierinput,butincreasesthesignalbandwidthconsiderably.Dependingonthespecificationsforhighgainorhighbandwidth,thistopologyisalsodubbedhigh-impedanceamplifierorlow-impedanceamplifier,dis-cussedinfurtherdetailsin[46].Becauseofthisimpracticaltrade-offbetw
8、eennoiseandbandwidth,thefeedbackresistortopologyhasbeendeveloped(Figure6.2),usuall
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